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Abstract
Practical Guidelines for the implementation
of back drilling plated through holes vias in multi-gigabit
board applications
Author:
Tom Cohen
Principle Mechanical Engineer
In copper board to board applications, data
rates of 2.5 Gb/s are common. Recently there have been numerous
efforts to boost single channel data rates to and beyond the
10 Gb/s range. These channels can be broken into segments
comprised of the device, package effects, board laminate material,
high speed connectors, and the launches into and back out
of the interior layers of the printed circuit boards or via's.
This paper will focus on the PCB launch, specifically a technique
referred to as back drilling. It has been shown in previous
DesignCon papers that by back drilling the via, the launch
impedance is improved by reducing via capacitance and more
importantly the launch resonance effect is mitigated. In thick
boards, such as backplanes, S21 measurements have shown a
well defined notch at around 5 GHz where very little power
gets through because the stub behaves like an unterminated
transmission line. Other high speed applications have considered
back drilling such as BGA patterns and coaxial launches. The
effect of a drilled via applies equally to surface mount terminations
where a drilled through hole is used to connect to inner layers
deep in the board. This paper will address some unanswered
questions which have been raised by designers on the implications
of using this technique. Electrically, measurements will provide
design guidelines for improved frequency response as a function
of stub length. Via diameter, antipad diameter, and board
laminate material will also be considered. Mechanically, long
term reliability of a back drilled via structure will be looked
at for CAF growth and compliant pin termination and repair.
Accelerated life testing will stress the back drilled holes
to look for delamination and other detrimental effects. The
producability of the printed circuit boards will be analysed
in the area's of required overdrill diameter, z axis depth
accuracy, and a cost estimation.
Back Drilling Overview
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Electrical effects |
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Process implications |
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Reliability testing |
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Conclusion |

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