Amphenol TCS
Booth 105

Visit Amphenol TCS at DesignCon 2008 to see why we lead the industry in product innovation, developing products that meet and exceed next generation technology requirements.

DesignCon 2008
February 4 - 7, 2008
Santa Clara Convention Center
Santa Clara, California

Exhibit Hours:
Tuesday, February 5 | 12:30 pm - 6:30 pm
Wednesday, February 6 | 12:30 pm- 6:30 pm

2008 DesignVision Award Finalist

Amphenol's XCede® Connector Platform is designed to support 20+ Gbps data rate requirements for datacom, telecom, storage and wireless equipment, meeting and exceeding standards set for Ethernet, SONET/SDH, PCIe, Fibre Channel and Infiniband among others, while employing a highly reliable press-fit attachment. An innovative 3D shield technology enables very low crosstalk and incorporates advanced materials to prevent high frequency resonances. Design features within the connector remove skew within any differential pair, dramatically simplifying the board layout process. This level of electrical performance and design flexibility allows equipment manufacturers to reliably meet today’s data rates and easily implement performance upgrades in the future, as higher performing silicon becomes available. [learn more]

Technical Presentations:

Thursday, February 7 | 9:50 am – 10:30 am
Performance Limitations of Backplane Links at 6 Gbps and Above

Authors:
Brian Kirk, Principal Signal Integrity Engineer, Amphenol TCS
Jason Chan, Signal Integrity Engineer, Amphenol TCS
Jose Paniagua, Signal Integrity Engineer, Amphenol TCS

As data rates exceed 6 Gbps, the size of many physical structures within backplane interconnects become significant. For example, the electrical length of a typical backplane connector produces standing wave resonances of between 2 and 3 GHz. This can result in dramatic changes in crosstalk, mode conversion, and insertion loss deviation at fundamental frequencies of interest. These passive interconnect issues can be further compounded by the common mode issues and other challenges faced by silicon vendors and chip designers. This paper focuses on the major performance limitations seen across numerous backplane designs and methods used to improve the overall performance.

Register Now:
Register for a free VIP Exhibits PLUS pass from Amphenol. This pass allows our customers to register for access to all complementary educational programming and the technology exhibition at no cost. After December 20, Exhibits PLUS registration is $100 for registrants without access to a VIP Exhibits PLUS pass. Please note, through registration this pass allows all your exhibits registration to wave this $100 fee.

The Exhibits PLUS Pass grants access to the following complimentary educational programming:

• Technology Exhibition
• Technical panels
• Networking Receptions
• Plenary Panels
• Keynote Addresses
• TecPreview Sessions

The Exhibits PLUS Pass also provides a link for technical conference registration at a 30% discount.

Use the following link to register: http://www.designcon.com/2008/vip_pass/amphenol.html